Click on a field for more information about its function.
NoICE for the 68HC08 supports several methods of operation
Additional information is available about specific 68HC08 target boards
If you are using MON08 with a USB-serial converter, please read this.
There are many flavors of HC08, and Motorola/Freescale comes out with more all the time. The following table shows the HC08 variantes currently supported by NoICE. We have carefully constructed the support files based on the latest Motorola/Freescale documentation, but we do not have the resources to verify NoICE with all of these targets. If you have any problems, or questions about a specific target, please contact us.
| Processor | Comments |
|---|---|
| HC08AB32 | |
| HC08AP8, 16, 32, and 64 | Must use Mass Erase, as Block Erase cannot erase the vectors. High-speed Flash burner supported. |
| HC08AS60A | |
| HC08AZ32A, 60A | Verified on customer board. High-speed Flash burner supported. |
| HC08BD48 | |
| HC08GP32 | Verified on Elektronikladen HC08 Welcome Kit and Axiom CMS8GP32. High-speed Flash burner supported. |
| HC08GR4 and 8 | |
| HC08GR32A, 48A, and 60A | |
| HC08GZ16, 32, 48, and 60 | |
| HC08JB8 | Verified on Elektronikladen USB08 Must use Mass Erase, as Block Erase cannot erase the vectors. High-speed Flash burner supported. |
| HC08JK3 | Must use Mass Erase, as Block Erase cannot erase the vectors. |
| HC08JL3 | Verified on ISDC ISDC08JL Must use Mass Erase, as Block Erase cannot erase the vectors. |
| HC08JL8 | Must use Mass Erase, as Block Erase cannot erase the vectors. |
| HC08KX8 | |
| HC08LD64 | Verified on Customer-provided board. High-speed Flash burner supported. The LD64 has three segments of Flash: Data Flash, OSD Flash, and main Code Flash. Because of this, NoICE does not use its normal Block Erase logic for this chip. Instead, when NoICE detects the first byte being LOADed into a Flash segment, that entire segment is erased. The first write into the main Code Flash causes a Mass Erase of the Code Flash. This is necessary because the interrupt vectors on the LD64 cannot be erased by Block Erase. |
| HC08LK24 | Must use Mass Erase, as Block Erase cannot erase the vectors. |
| HC08MR32 | |
| HC08QB8 | |
| HC08QT1/QY1 | |
| HC08QT4/QY4 | Verified on Motorola/Freescale Nitron demo board.
Two configuration files are provided. One assumes the presence of what Motorola/Freescale calls the "User Monitor", and allows operation without an external oscillator or Vtst applied to IRQ. This configuration disables erase of the Flash region where the User Monitor resides. This is how the Nitron demo board ships. The second configuration allows complete access to the Flash. However, this can result in the erasure of the User Monitor and calibration constant. Thus, this configuration should only be used if you have an external oscillator and Vtst applied to the IRQ pin. |
| HC08SR12 | Must use Mass Erase, as Block Erase cannot erase the vectors. |
| MC9S08AC8, 16, 32, 48, and 60 | |
| MC9S08AW16, 32, 48, and 60 | |
| MC9S08DZ16, 32, 48, and 60 | |
| MCS908GB32 and 60 | Verified on Axiom AXM0310 (Motorola M68DEMO908GB60) using BDM and AN2140 monitor |
| MC9S08GB32A, and 60A | |
| MC9S08GT16, 32, and 60 | |
| MC9S08GT8A, 16A, 32A, and 60A | |
| MC9S08JM8, 16, 32, and 60 | |
| MC9S08QG4 and 8 | Verified on Freescale DEMO9S08QG8 board using built-in P&E BDM |
| MC9S08Rx8, 16, 32, and 60 |
Most members of the HC08 family contain a primitive monitor in ROM. This monitor uses a single I/O pin rather than a UART. Speed is determined by your processor crystal, but it requires a minimum of external hardware support. Details vary slightly from one processor type to another. Exact requirements may be found in the datasheet for your processor.
NoICE can use MON08 directly to read and write memory, run programs, single step, and set breakpoints. Select Options, Target Communications from the menu. Then select "68HC08 ROM Monitor (MON08)" from the Interface drop list.
NoICE allows you to select a standard baud rate from a drop-list. You can also enter a non-standard rate, should your application require it. However, be aware that a standard PC serial port can only generate baud rates that are exact divisors of 115,200. Thus, the PC can generate 9600 baud (115200/12), or 10472.73 baud (115200/11), but not 10000 baud. If you enter a baud rate of 10000, Windows will chose the closest available baud rate. Since the closest available rate in this case is about 4 percent off, operation is not likely to be satisfactory.
MON08 relies on sending a 10-bit serial break at various times. We have found that some USB-serial converters do not function correctly when they see this break signal. They distort the timing, and in at least some cases they drop or mangle the following byte. This is a problem in the converter's driver, and there is nothing that NoICE can do to work around it.
USB-serial converters based on the Prolific chip seem to be unusable for MON08. We have successfully used NoICE08 with USB-serial converters based on the FDTI FT2232 chip, and on the Silicon Laboratories CP2102. If you can't see the markings on the chip in your converter, open the Windows Device Manager. Find the COM port associated with your converter, right-click, and select "Properties". Either the name of the device or the information in the driver tab may identify the vendor.
If possible, we recommend that you use a "real" serial port for MON08. If your new PC doesn't have one, and you cannot find an appropriate USB-serial converter, you may want to purchase a PCI serial card.
This problem does not affect the serial-connected BDM12 pods, or the old NoICE serial protocol used on some other targets. These protocols do not rely on break signals and generally work well with USB-serial converters.
The RTS and DTR drop-lists allow you to specify the normal state of these RS-232 control lines while NoICE is running. The use, if any, of these lines is up to your hardware.
Certain aspects of Flash erasing and burning require the HC08 to be reset. It is useful, but not necessary, that NoICE be able to automatically perform this reset. Some hardware, such as the Axiom CMS8GP32 and the Elektronikladen HC08 Welcome Kit Rev 2, connects the serial RTS or DTR line to reset. If you are designing a board, this is a very handy feature to include.
NoICE MON08 support can be configured to toggle either the RTS or DTR control line to cause a reset. RTS and DTR may be configured in either state as required by your hardware, with a transition to the opposite state to cause a reset.
If your hardware does not include this feature, select "manual reset", and NoICE will prompt you when to reset your target.
If "Toggle RTS" or "Toggle DTR" is selected, the line is switched to the opposite state for 200 msec, then back to the normal state for 200 msec before NoICE continues. If "Toggle RTS does POR" or "Toggle DTR does POR" is selected, the line is switched to the opposite state for 1000 msec, then back to the normal state for 1000 msec before NoICE continues.
If you need a time duration other than these values, you can add a RESETTIME line to your processor configuration file.
For reasons known only to Motorola/Freescale, the HC08's Flash security is only affected by a power-on reset - not by other resets. The ideal hardware for NoICE would connect RTS or DTR to cause a power-on reset. Lacking this, NoICE will prompt you when to cycle power on your target.
It is up to you and your hardware which method to choose. You may need to control the levels on other pins in order to control the bus frequency and baud rate. The details vary with each member of the HC08 family, so you must consult the datasheet for your processor.
Please note that if you burn a program that contains a reset vector into HC08 Flash, the next startup will not be in MON08 mode unless you have the high voltage applied to IRQ.
If "Don't burn reset vector" is checked, NoICE will remember the bytes "written" to the reset vector during LOAD, but will leave the actual Flash locations blank. Thus, you can continue to start up in monitor mode even without Vtst applied to the IRQ pin. NoICE will set the PC to the remembered address, so debugging is unaffected.
Note, however, that if you subsequently want to run without NoICE, you will need to reburn your program including the reset vector.
Most members of the HC08 family contain a single hardware breakpoint register. NoICE uses this breakpoint in conjunction with MON08 to allow single-step and breakpoint operations on programs executing from Flash. Because the breakpoint is implemented in hardware, only one breakpoint is allowed at a time.
For convenience, you may elect to move the single breakpoint simply by double-clicking on the new breakpoint address - you do not need to remove the old breakpoint first. NoICE will ask you if this is your preference the first time you attempt to insert a second breakpoint. You can change the preference at any time by opening the breakpoint list dialog.
The breakpoint hardware is quite primitive: simply an address comparator. This means that any access of the breakpoint location - not just an instruction fetch - will trigger the breakpoint. In particular, the 68HC08's instruction pre-fetch may read the byte at the breakpoint location during the execution of the previous instruction.
NoICE contains logic to recognize false hits on the breakpoint hardware. When one occurs, NoICE rearms the breakpoint and allows the program to continue. In most cases, you will not notice any effect on your program. However, you should be aware that your code may not run at full processor speed depending on where the breakpoint is set.
NoICE can use MON08 to download and run a small Flash EPROM burning program from 68HC08 RAM. If such a program is specified, NoICE will automatically erase and burn the Flash when the NoICE LOAD command is used. Other memory editing commands will not use the burner program.
MON08 generally runs at moderate baud rates, and it uses a fairly inefficient protocol. This can cause annoying lags when NoICE reads memory to refresh the screen. If "Cache Flash Contents" is checked, NoICE will remember the contents of Flash and ROM memory in PC memory, and avoid reading from the target when possible. If your application writes to Flash, you should leave this option unchecked, as the cache works only if NoICE knows when Flash changes.
If "Always Use Mass Erase" is checked, NoICE will use Mass Erase rather than Block Erase during Flash programming. This can be slightly faster, and it will ensure a "clean" Flash by erasing any remnants of previous programs.
Some HC08 variants cannot use Block Erase on their interrupt vectors. For these processors, "Always Use Mass Erase" should always be checked. In most cases, the configuration file will contain the NOBLOCKERASE keyword, which will set the checkbox automatically.
In order to read or program the Flash, NoICE must know the chip's security "key", which is the contents of the interrupt vectors in the range 0xFFF6 to 0xFFFD. You can enter these values into the MON08 DLL setup dialog.
When NoICE burns a program into Flash, it keeps track of bytes written to the security range and saves them in the Windows Registry for use as the security key for future resets.
If you do not know the security code for the Flash, you may still bulk erase the Flash. When the security sequence fails to unlock the Flash, NoICE will ask you whether you wish to cycle power and try again (only a power-on reset allows a new security sequence), or whether you wish to bulk erase the Flash.
After bulk erase, you must cycle power in order to reset the security system.
The MON08 protocol is very inefficient, requiring many more bytes to be sent and recieved than would be necessary. Since the basic Flash burning program used by NoICE uses the monitor to send data to be burned to the target, Flash burning can be slow - up to 100 seconds to burn 4K at 9600 baud.
A faster protocol can be used, but it requires knowledge of internal entrypoints in the MON08 ROM. These entrypoints are in many cases not documented (and some of the documented ones are incorrect). However, the speed up is very impressive: the 100 second burn time mentioned above decreases to 13 seconds using the revised protocol.
Since discovering the internal entrypoints requires disassembly of the MON08 ROM, and each HC08 family member has a slightly different ROM, the high-speed algorithm is only available for targets that we have had access to for disassembly and testing. If you need a fast burner for another family member, please contact us
Some members of the HC08 family contain Flash memory that is rated at only 100 program/erase cycles. In practice, you will usually be able to program many more times that this, but be aware of possible wearout.
Most newer members of the HC08 family use Split Gate or "SST" Flash that allows up to 10,000 program/erase cycles. Consult your datasheets for details.
Motorola/Freescale likes to change peripheral addresses from one processor to another. Among the addresses moved are the hardware breakpoint and the Flash EPROM control registers. Because of this, you must select your processor chip from the drop-list in the NoICE communications dialog. A status box shows the configuration of the selected chip.
If you wish to burn Flash, you must also enter your processor's bus frequency (not its crystal speed). This field is a combo box: if the frequency you want isn't in the drop-list, just type the value.
CAUTION: Selecting an incorrect chip type, or entering an incorrect bus speed may cause premature wearout or even immediate destruction of the Flash.
The available processor configurations are stored in files with an extension of ".NoICE08", and stored in the "config" subdirectory. NoICE reads these files to populate the drop list when you open the communications dialog.
Normally you can use the configuration files as provided, and need not worry about the files or their contents. However, if you need to add a file for a new processor, or modify some detail of an existing file, this section describes the contents of the file.
If you prefer not to customize the configuration file yourself, ask us. We will generally perform the customization in return for you loaning us hardware, or testing the results on your hardware.
Here is an example of the configuration file for the 68HC908GP32. The contents are described below.
TITLE 68HC908GP32 ; Updated 22 February 2002 by John Hartman ; Breakpoint BRKH FE09 ; Optional duration of Reset or POR pulse RESETTIME 2000 ; Memory layout ERASEPAGE 128 PROGPAGE 64 ERASEVALUE FF ; Force the use of Mass Erase rather than Block Erase NOBLOCKERASE RAM 0040-023F FLASH 8000-FDFF ROM FE20-FF52 FLASH FFDC-FFFF ; Burner for Flash S01F0000633A5C6E6F6963655C6D6F6E69746F72735C50726F673930382E70725D S1230100000101010901410192C60100B742A6FFC7FF7EA60645FE08F7C6FF7EC7FF7EB626 S11C012042474BFEA60E45FE08F7A67AAD59A60CF7A604AD524FF74F836A S1230141C60100B7423540A6FFC7FF7EA602C7FE08C6FF7EF7B642474BFEA60A45FE08F753 S1230161A620AD22A608F7B642474BFE4FF75540A680B743A6FFF4A3FF2705AF013B43F632 S1230181432702A6018387B642A0034BFE864BF6813540B743B744C60100B742A6FFC7FF7C S12301A17E4501013545A601C7FE08C6FF7E5540F7B642474BFEA609C7FE08B64247474BE3 S12301C1FE5545F6AF0135455540F7AF013540B642A00A4BFE3B43E9B642474BFEA608C762 S12301E1FE08B64247474BFE4FC7FE085545AFFFF635455540AFFFF1260735403B44ED4FC0 S107020183A6018348 S9030000FC
The text after TITLE is what shows up in the processor type drop list.
BRKH gives the address (hex) of the breakpoint hardware.
RESETTIME is an optional line that specifies the duration in milliseconds (decimal) of the RTS or DTR reset pulse. If this line is not present (as it is not in the standard configuration files), the default values described above are used.
ERASEPAGE is the erase page size (decimal) of the Flash
PROGPAGE is the program page size (decimal) of the Flash
ERASEVALUE is the value (hex) to which Flash is erased
NOBLOCKERASE is an optional line that tells NoICE to always use Mass Erase rather than Block Erase. This is necessary for some HC08 variants that cannot erase their interrupt vectors using Block Erase.
One or more RAM commands specify the address ranges of RAM. This is used by the breakpoint logic: software breakpoints (of which there are an unlimited number) are used in RAM, while hardware breakpoints (of which there is only one) must be used outside of RAM.
One or more FLASH commands specify the address ranges of the Flash. This is used by the Flash burning code. If you enable memory caching, NoICE will also remember values read from Flash regions, and avoid re-reading them from the target. This can substantially speed up debugging.
One or more ROM commands specify the address ranges of ROM or other memory that cannot be modified by the processor. (In the case of the 68HC908GP32, this is the MON08 ROM.) If you enable memory caching, NoICE will also remember values read from ROM regions, and avoid re-reading them from the target. This can substantially speed up debugging.
The remainder of the file is S-records for a Flash burner program.
Made by Axiom Manufacturing Company (http://www.axman.com)
This board contains a 68HC908GP32 processor and a solderless breadboard. Development features:
The most common setting for NoICE will be
Made by Elektronikladen (http://elmicro.com).
There are two versions of this board. The newer version (2.01) has a prototype area consisting of a 12 by 6 grid of plated-through holes, a four-terminal regulator, and a power LED.
The original board (version 1) lacks the prototype area, and has a three-terminal regulator. If you have the older board, please read the description in the next section.
This board contains a 68HC908GP32 processor with headers to permit access to all port pins. Development features:
The most common setting for NoICE will be
Remember: if DTR is set to control power, then power will be off if DTR is off. Don't be worried when you plug things in and power LED doesn't come on immediately. Power should come on when you run NoICE.
The break IRQ feature can be used to break into a running program. To use this feature:
irq: inc 5,sp ;increment PC
bne m1
inc 4,sp
m1: lda $fefd ;push contents of SWI vector
psha
lda $fefc
psha
rts ;jump to SWI handler
This odd bit of code increments the stacked PC, then jumps to the MON08 SWI handler. The SWI handler tells NoICE that your program has stopped. NoICE thinks that an SWI breakpoint has occurred, so it decrements the PC - back to the value after the IRQ!
BRK 1
to begin a serial break and
BRK 0
to end it. For convenience, you could make a file called STOPIT.NOI containing
BRK 1
WAIT 100
BRK 0
Typing STOPIT would then issue the break
Made by Elektronikladen (http://elmicro.com).
There are two versions of this board. This section describes Version 1.
This board contains a 68HC908GP32 processor with headers to permit access to all port pins. Development features:
The most common setting for NoICE will be
Made by Elektronikladen (http://elmicro.com).
This board contains a 68HC908JB8 processor. It is designed for USB development work, and contains a USB interface. Development features:
The most common setting for NoICE will be
Made by ISDC (http://www.claybrooke.org.uk/ISDC/08/).
This board contains a 68HC908JL3 processor, a piezo speaker and and LED bar-graph. Development features:
The most common setting for NoICE will be
This single-sided board contains a 68HC908QT4 processor, an LED, a pot, and a push-button. Motorola/Freescale gave away a bunch of these when the Nitron was introduced.
The Nitrons present some difficulties for debugging under MON08. Because the chip used is in an 8-pin package, the normal strapping for MON08 is not useful for debugging, as it would consume most of the I/O pins. The need to set the on-chip oscillator frequency to achieve a standard baud rate is also a complication. There are several ways to get around these problems.
Motorola/Freescale ships the board with the HC08 containing what they call the "User Monitor". This is described in Motorola/Freescale Application Note AN2305_D. The User Monitor sets the bus frequency to a factory-calibrated 3.2 MHz, and if IRQ is low (pushbutton pressed), it enters monitor mode at 9600 baud. If IRQ is not low, control is passed to a user program.
Appropriate settings for NoICE when used with User Monitor are
The first time you use NoICE with the board, NoICE will probably say "Security Failed", and ask if you want to do a mass erase. Say "No", as you don't want to wipe out the user monitor. Use NoICE to examine the contents of memory between FFF6 and FFFD, and enter these values as the security bytes in NoICE's communications setup dialog. Once you do this, you will no longer be pestered about security.
Note that the User Monitor takes over the interrupt vectors. It re-vectors most of them through pseudo-vectors lower in Flash. Refer to Motorola/Freescale Application Note AN2305 for details on how this impacts your program.
Hint: the first thing that you should do is use NoICE to read the contents of Flash at address FFC0. This byte contains the calibration value to set the internal oscillator to 3.2 MHz. If you manage to wipe out the User Monitor, you will need to know this value. So write down the value in a safe place.
Hint: if you have the ability to reburn the User Monitor (by connecting an external oscillator and Vtst), it is quite convenient to modify the User Monitor so that you don't have to press the IRQ pushbutton every time you reset the chip. Doing this means that the board will not execute your program automatically when you power up the chip. However, if you intend to use the board mostly for debugging with NoICE, this modification can save you a lot of annoyance.
To permit full access to Flash on the Nitrons, you must connect an external 9.8 MHz oscillator and apply Vtst to the IRQ pin. CAUTION: this mode of operation allows you to erase the User Monitor and calibration constant. Thus, this configuration should only be used if you have the ability to re-calibrate and re-program the chip.
Appropriate settings for NoICE when used with external oscillator are
A third mode of operation is possible if the RESET vector (FFFE and FFFF) is blank, and IRQ is held low during power up. In this case, the chip will enter MON08 mode using the oscillator calibration value from location FFC0. The chip will enter MON08 mode even if the entire Flash is blank. However, in this case the oscillator frequency will most likely be such that the baud rate will not be compatible with NoICE.
CAUTION: You should only attempt operation in this mode if you are able to connect an external oscillator and Vtst as described in the previous section. Otherwise, any slight mishap during programming could render your board useless.
The first thing that you should do is use NoICE to read the contents of Flash at address FFC0. This byte contains the calibration value to set the internal oscillator to 3.2 MHz. If you manage to wipe out the User Monitor, you will need to know this value. So write down the value in a safe place.
Appropriate settings for NoICE when used with blank reset vector are
Note that IRQ must be low at reset, and the calibration constant at address FFC0 must be correct or the chip will enter MON08 at the wrong baud rate. If IRQ is high, MON08 will assume a 2.4576 MHz bus frequency rather than the actual 3.2 MHz, resulting in a baud rate of about 12,500. This is not compatible with any baud rate that can be generated by a standard PC serial port. Unlike the User Monitor case, where you can re-program the IRQ test, the code in this case is in ROM and cannot be changed.